[PATCH] D144955: Fix SGPR + offset Scratch offset folding

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: foad, dstuttard, AMDGPU.
Herald added subscribers: kosarev, StephenFan, kerbowa, hiraditya, jvesely, arsenm.
Herald added a project: All.
Petar.Avramovic requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Values in SGPR register are treated as unsigned by hardware.

When value in 32-bit SGPR base can be negative calculate offset using
32-bit add instruction, otherwise use sgpr base(unsigned) + offset.
Does not affect case where whole offset comes from SGPR register
(immediate offset is 0).

LoopStrengthReduce.cpp changes offsets to negative and in some
iterations value in SGPR register could be negative.


https://reviews.llvm.org/D144955

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D144955.501088.patch
Type: text/x-patch
Size: 34452 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230228/e7623725/attachment.bin>