[PATCH] D144900: [X86] Add DwarfRegNums for segment registers

[Roland McGrath via Phabricator via llvm-commits]

mcgrathr added inline comments.


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Comment at: llvm/lib/Target/X86/X86RegisterInfo.td:323
 // Segment registers
-def CS : X86Reg<"cs", 1>;
-def DS : X86Reg<"ds", 3>;
-def SS : X86Reg<"ss", 2>;
-def ES : X86Reg<"es", 0>;
-def FS : X86Reg<"fs", 4>;
-def GS : X86Reg<"gs", 5>;
+def CS : X86Reg<"cs", 1>, DwarfRegNum<[51, 41, -2]>;
+def DS : X86Reg<"ds", 3>, DwarfRegNum<[53, 43, -2]>;
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The comment above says this should be: [x86-64, x86-32 Darwin EH, generic x86-32].
So I think the -2 case is the middle one not the third one.


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  https://reviews.llvm.org/D144900/new/

https://reviews.llvm.org/D144900