[PATCH] D144846: [IR][Legalization] Promote illegal deinterleave and interleave vectors

[Caroline via Phabricator via llvm-commits]

CarolineConcatto created this revision.
Herald added a subscriber: hiraditya.
Herald added a project: All.
CarolineConcatto requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

To make legalization easier, the operands and outputs have the same size for
these ISD Nodes. When legalizing the results in PromoteIntegerResult the operands
are legalized to the same size as the outputs.
The ISD Node has two output/results, therefore the legalizing functions update
both results/outputs.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D144846

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
  llvm/test/CodeGen/AArch64/sve-vector-interleave.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D144846.500683.patch
Type: text/x-patch
Size: 8439 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230227/da03df2e/attachment-0001.bin>