[llvm] ab76f58 - [PPC] Fix abs(sub(x,y)) -> abs(x,y) tests

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 25 12:03:23 PST 2023


Author: Simon Pilgrim
Date: 2023-02-25T19:59:48Z
New Revision: ab76f5865f21ee6448744b10416f7b1a124845a8

URL: https://github.com/llvm/llvm-project/commit/ab76f5865f21ee6448744b10416f7b1a124845a8
DIFF: https://github.com/llvm/llvm-project/commit/ab76f5865f21ee6448744b10416f7b1a124845a8.diff

LOG: [PPC] Fix abs(sub(x,y)) -> abs(x,y) tests

As detailed on D142313, this fold should be restricted by sub nsw

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll b/llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
index d08e0ef3883cc..11672dc71efc2 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
@@ -1246,7 +1246,7 @@ define <4 x i32> @sub_absv_vec_32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr
 ; CHECK-PWR78-NEXT:    vmaxsw v2, v2, v3
 ; CHECK-PWR78-NEXT:    blr
 entry:
-  %sub = sub <4 x i32> %a, %b
+  %sub = sub nsw <4 x i32> %a, %b
   %sub.i = sub <4 x i32> zeroinitializer, %sub
   %0 = tail call <4 x i32> @llvm.ppc.altivec.vmaxsw(<4 x i32> %sub, <4 x i32> %sub.i)
   ret <4 x i32> %0
@@ -1269,7 +1269,7 @@ define <8 x i16> @sub_absv_vec_16(<8 x i16> %a, <8 x i16> %b) local_unnamed_addr
 ; CHECK-PWR78-NEXT:    vmaxsh v2, v2, v3
 ; CHECK-PWR78-NEXT:    blr
 entry:
-  %sub = sub <8 x i16> %a, %b
+  %sub = sub nsw <8 x i16> %a, %b
   %sub.i = sub <8 x i16> zeroinitializer, %sub
   %0 = tail call <8 x i16> @llvm.ppc.altivec.vmaxsh(<8 x i16> %sub, <8 x i16> %sub.i)
   ret <8 x i16> %0
@@ -1292,7 +1292,7 @@ define <16 x i8> @sub_absv_vec_8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr
 ; CHECK-PWR78-NEXT:    vmaxsb v2, v2, v3
 ; CHECK-PWR78-NEXT:    blr
 entry:
-  %sub = sub <16 x i8> %a, %b
+  %sub = sub nsw <16 x i8> %a, %b
   %sub.i = sub <16 x i8> zeroinitializer, %sub
   %0 = tail call <16 x i8> @llvm.ppc.altivec.vmaxsb(<16 x i8> %sub, <16 x i8> %sub.i)
   ret <16 x i8> %0


        


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