[PATCH] D144393: [X86] Add schedule module for Gracemont

[Haohai, Wen via Phabricator via llvm-commits]

HaohaiWen added a comment.

In D144393#4142944 <https://reviews.llvm.org/D144393#4142944>, @RKSimon wrote:

> Would this be a good time to add alderlake-p and alderlake-e cpu name aliases as well?

This model is not yet complete, we still miss lots of port/lat. (see // FIXME: Incompleted schedwrite. and GRTPortInvalid)

Should we rename alderlake-p to other name like alderlake-pc. Alder Lake P is also product series name (https://www.intel.com/content/www/us/en/products/platforms/details/alder-lake-p.html).


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