[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6635
+
+  MVT IdxVT = WideVT.changeVectorElementTypeToInteger();
+  // Create a vector of even indices {0, 2, 4, ...}
----------------
luke wrote:
> reames wrote:
> > reames wrote:
> > > The index type here doesn't look right.  Say we have two vectors of i8.  On a VLEN>2048 machine, we need the index type to be larger than i8.  
> > Realized the case I raised is unreachable until the fast path above is removed (as I suggested).  
> Come think of it this could just be replaced with `i16` and `VRGATHEREI16` instead, saving some space.
Never mind, this causes an extra `vsetvli`


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  https://reviews.llvm.org/D144092/new/

https://reviews.llvm.org/D144092