[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6703
+
+    SDValue VLMAX = DAG.getNode(
+        ISD::VSCALE, DL, XLenVT,
----------------
craig.topper wrote:
> luke wrote:
> > reames wrote:
> > > See newly added computeVLMax.
> > It looks like `computeVLMAX` computes the maximum VLMAX statically, not the actual VLMAX on the current hardware.
> > Although there's a bunch of other places where VLMAX is computed.
> > Maybe we can rename `computeVLMAX` to `computeMaxVLMAX`, and then add a helper function `getVLMAX`
> It's using ISD::VSCALE which will be expanded to something like `csrr a0, vlenb; srli a0, 3`. We define "vscale" as vlen/64. vlenb is already in bytes so we divide by with a shift.
Oops that should have said "We define "vscale" as vlen/64. vlenb is already in bytes so we divide by another 8 with a shift right by 3."


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  https://reviews.llvm.org/D144092/new/

https://reviews.llvm.org/D144092