[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6605
+
+  // If the element type is smaller than ELEN, then we can deinterleave
+  // through vnsrl.wi
----------------
reames wrote:
> I strongly request we drop the optimized case from the initial patch and come back to these in follow up changes.  I want to focus on having a correct base lowering first.  
Staring at this code and the analogous code in fixed length vector lowering, I'm going to drop this request.  Instead, I'm going to explore a pre-change to make sharing that logic possible.  


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6679
+
+  // If the element type is smaller than ELEN, then we can interleave with
+  // vwaddu.vv and vwmaccu.vx
----------------
reames wrote:
> Please drop the optimized case from the initial patch.
Same here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144092/new/

https://reviews.llvm.org/D144092