[PATCH] D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 20 14:51:57 PST 2023
Joe_Nash added a comment.
In D144271#4139981 <https://reviews.llvm.org/D144271#4139981>, @arsenm wrote:
> In D144271#4139979 <https://reviews.llvm.org/D144271#4139979>, @Joe_Nash wrote:
>
>> Actually, I think due to the way the operand lists for _e32 instructions are constructed, the modifiers are not taking effect.
>> If you dump the tablegen records, if the change was effective there should be a src0_modifiers operand on the V_MOV_B32_e32 instruction.
>
> I'd expect it to only be on v_mov_b32_e64?
I guess the spec was changed between gfx9 and gfx10. On gfx10 and newer the docs say modifiers are supported on VOP1 as well as VOP3. But in terms of what our backend would make with just the above patch, it seems the modifiers would be on v_mov_b32_e64 but not v_mov_b32_e32. Hence my ask to check the tablegen records.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144271/new/
https://reviews.llvm.org/D144271
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