[PATCH] D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32

Mon Feb 20 14:44:34 PST 2023

Joe_Nash added a comment.

Thanks for taking a look at this issue.

First, I am surprised there are not many more crashes without further modifications to codegen passes to account for the changed number of operands. For example
SIFoldOperand.cpp:693
The number of operands has changed, so I would expect removing the operands to break quite badly.

Actually, I think due to the way the operand lists for _e32 instructions are constructed, the modifiers are not taking effect.
If you dump the tablegen records, if the change was effective there should be a src0_modifiers operand on the V_MOV_B32_e32 instruction.

That said, I'm not convinced doing this properly would be worth the effort. Perhaps I should just close the issue.
@arsenm 
@foad

================
Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt:435
+
+# GFX11: v_mov_b32_e64_dpp v5, sext(v2) clamp dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x80,0x81,0xd5,0xe9,0x00,0x00,0x20,0x02,0x77,0x39,0x05]
+0x05,0x80,0x81,0xd5,0xe9,0x00,0x00,0x20,0x02,0x77,0x39,0x05
----------------
It's curious that this results in sext(v2). It should print -v2. sext is not supported on v_mov_b32. Perhaps this is caused by the wrong operand class being set, or due to a bug in the inst printer.

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144271/new/

https://reviews.llvm.org/D144271