[PATCH] D143646: [RISCV] Return false from shouldFormOverflowOp

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 12 16:42:47 PST 2023


craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/overflow-intrinsics.ll:87
   store i64 %add, ptr %res
   ret i64 %Q
 }
----------------
liaolucy wrote:
> This can be optimized in riscv DAG combine. I'll write another patch.
> to:
> ```
>   %add = add i64 %b, %a
>   %cmp = icmp ult i64 %b, 0
>   %Q = select i1 %cmp, i64 %b, i64 42
>   store i64 %add, ptr %res
> ```
That doesn't look right.

```
%cmp = icmp ult i64 %b, 0
```

is always false. There is no value of %b that can less than 0 when treated as unsigned. 0 is the smallest value.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143646/new/

https://reviews.llvm.org/D143646



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