[PATCH] D143731: [AMDGPU] Scalarize some large PHIs for DAGISel

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-scalarize-large-phis.ll:612
+  ret void
+}
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Pierre-vh wrote:
> arsenm wrote:
> > Should also include some FP, 8-bit and 16-bit element cases. We’d be bette riff breaking those into 32 or 64 bit pieces than full scalarization
> Should I also lower the threshold for this to kick in? Else 8 bit vectors won't be interesting unless they're >32 elts
We only really have 32-bit registers. Everything wider is a bit unnatural. GlobalISel breaks everything into 32 or 64 pieces. There may be second order benefits from a compiler machinery perspective for preserving larger pieces. There’s room for experimentation 


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https://reviews.llvm.org/D143731