[PATCH] D136529: [DAG] canCreateUndefOrPoison - add support for SRA/SRL shift opcode (WIP)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon updated this revision to Diff 495918.
RKSimon added a comment.

rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136529/new/

https://reviews.llvm.org/D136529

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/AMDGPU/udiv64.ll
  llvm/test/CodeGen/RISCV/iabs.ll
  llvm/test/CodeGen/RISCV/rv64zbb.ll
  llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
  llvm/test/CodeGen/X86/freeze-binary.ll
  llvm/test/CodeGen/X86/midpoint-int-vec-512.ll

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