[PATCH] D142594: [AArch64] Eliminating the use of integer unit in moving from a Neon scalar result of a uaddlv to a Neon vector

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 7 21:05:30 PST 2023


efriedma added a comment.

The other option is to do some lowering earlier: split the intrinsic into two operations (the reduction, and the vector extract), and select them separately.  We already have AArch64ISD opcodes for other reductions; see combineAcrossLanesIntrinsic in AArch64ISelLowering.cpp.  This could unlock additional optimizations.  (For example, we could combine the insert with another shuffle.)


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