[PATCH] D143506: [AArch64] Fix LSE2/LSE128/RCPC3 precedence

[Sam Elliott via Phabricator via llvm-commits]

lenary added a comment.

Broadly, I think this is clearer, and shows that RCPC3 is more specific than LSE128 which is more specific than LSE2. I do have one concern shown in the tests.



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Comment at: llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-lse2_lse128.ll:127
 ; CHECK-LABEL: store_atomic_i128_aligned_monotonic:
-; CHECK:    stp x0, x1, [x2]
+; CHECK:    swpp x0, x1, [x2]
     store atomic i128 %value, ptr %ptr monotonic, align 16
----------------
I think in this case the `stp` is better, given it won't overwrite x0 and x1 - this doesn't matter if the values in both are dead at this point, but if they're used by anything after the store, then with `swpp` they will need to be copied into a different register.


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https://reviews.llvm.org/D143506