[PATCH] D143517: [AArch64][GlobalISel] Legalize wide s8/s16 vectors G_ADD/G_MUL/G_OR/...

[Vladislav Dzhidzhoev via Phabricator via llvm-commits]

dzhidzhoev created this revision.
dzhidzhoev added reviewers: aemerson, arsenm, t.p.northover, paquette.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dzhidzhoev requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Clamp the max number of elements of s8/s16 vectors when legalizing G_ADD,
G_SUB, G_MUL, G_AND, G_OR, G_XOR, in order to support some wide vectors.

Fixes https://github.com/llvm/llvm-project/issues/58156.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143517

Files:
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D143517.495584.patch
Type: text/x-patch
Size: 12341 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230207/69eb1622/attachment-0001.bin>