[PATCH] D143394: [RISCV] Add performMULcombine to perform strength-reduction

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8645
+                 ? Value
+                 : DAG.getNode(ISD::ANY_EXTEND, DL, XLenVT, Value);
+    };
----------------
craig.topper wrote:
> It's harmless to create a nop ANY_EXTEND. getNode detects it.
Though I'm not sure why the VT would be different. The code doesn't look through any extends or truncates so the types should be changing right?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D143394/new/

https://reviews.llvm.org/D143394