[PATCH] D143394: [RISCV] Add performMULcombine to perform strength-reduction

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8574
+                                 const RISCVSubtarget &Subtarget) {
+  SDLoc DL(N);
+  MVT XLenVT = Subtarget.getXLenVT();
----------------
Early exit if no `Subtarget.hasVendorXTHeadBa()`?



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8613
+
+  if (Subtarget.hasVendorXTHeadBa()) {
+    // We try to simplify using shift-and-add instructions into up to
----------------
Does it applicable on zba?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143394/new/

https://reviews.llvm.org/D143394