[llvm] fe6dd5d - [RISCV] Make selectImm return SDValue instead of SDNode*.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-02-04T16:26:18-08:00
New Revision: fe6dd5d3115987622907f7541314a2fe163eb57b

URL: https://github.com/llvm/llvm-project/commit/fe6dd5d3115987622907f7541314a2fe163eb57b
DIFF: https://github.com/llvm/llvm-project/commit/fe6dd5d3115987622907f7541314a2fe163eb57b.diff

LOG: [RISCV] Make selectImm return SDValue instead of SDNode*.

This avoids multiple places needing to convert it to SDValue. It's
simpler to convert it to SDNode * in the places that need it.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 636925b61e3d..1e2d57b9445a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -172,12 +172,12 @@ void RISCVDAGToDAGISel::PostprocessISelDAG() {
     CurDAG->RemoveDeadNodes();
 }
 
-static SDNode *selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
+static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
                             RISCVMatInt::InstSeq &Seq) {
-  SDNode *Result = nullptr;
   SDValue SrcReg = CurDAG->getRegister(RISCV::X0, VT);
   for (RISCVMatInt::Inst &Inst : Seq) {
     SDValue SDImm = CurDAG->getTargetConstant(Inst.getImm(), DL, VT);
+    SDNode *Result = nullptr;
     switch (Inst.getOpndKind()) {
     case RISCVMatInt::Imm:
       Result = CurDAG->getMachineNode(Inst.getOpcode(), DL, VT, SDImm);
@@ -198,10 +198,10 @@ static SDNode *selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
     SrcReg = SDValue(Result, 0);
   }
 
-  return Result;
+  return SrcReg;
 }
 
-static SDNode *selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
+static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
                          int64_t Imm, const RISCVSubtarget &Subtarget) {
   RISCVMatInt::InstSeq Seq =
       RISCVMatInt::generateInstSeq(Imm, Subtarget.getFeatureBits());
@@ -707,7 +707,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
     if (!isInt<32>(Imm) && isUInt<32>(Imm) && hasAllWUsers(Node))
       Imm = SignExtend64<32>(Imm);
 
-    ReplaceNode(Node, selectImm(CurDAG, DL, VT, Imm, *Subtarget));
+    ReplaceNode(Node, selectImm(CurDAG, DL, VT, Imm, *Subtarget).getNode());
     return;
   }
   case ISD::ConstantFP: {
@@ -720,10 +720,8 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       break;
     assert(VT.bitsLE(Subtarget->getXLenVT()) &&
            "Cannot create a 64 bit floating-point immediate value for rv32");
-    SDValue Imm =
-        SDValue(selectImm(CurDAG, DL, XLenVT,
-                          APF.bitcastToAPInt().getSExtValue(), *Subtarget),
-                0);
+    SDValue Imm = selectImm(CurDAG, DL, XLenVT,
+                            APF.bitcastToAPInt().getSExtValue(), *Subtarget);
     unsigned Opc;
     switch (VT.SimpleTy) {
     default:
@@ -1129,7 +1127,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       ShiftedC1 = SignExtend64<32>(ShiftedC1);
 
     // Create (mulhu (slli X, lzcnt(C2)), C1 << (XLen - lzcnt(C2))).
-    SDNode *Imm = selectImm(CurDAG, DL, VT, ShiftedC1, *Subtarget);
+    SDNode *Imm = selectImm(CurDAG, DL, VT, ShiftedC1, *Subtarget).getNode();
     SDNode *SLLI =
         CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0.getOperand(0),
                                CurDAG->getTargetConstant(LeadingZeros, DL, VT));
@@ -1973,7 +1971,7 @@ static bool selectConstantAddr(SelectionDAG *CurDAG, const SDLoc &DL,
   Seq.pop_back();
   assert(!Seq.empty() && "Expected more instructions in sequence");
 
-  Base = SDValue(selectImmSeq(CurDAG, DL, VT, Seq), 0);
+  Base = selectImmSeq(CurDAG, DL, VT, Seq);
   Offset = CurDAG->getTargetConstant(Lo12, DL, VT);
   return true;
 }
@@ -2596,9 +2594,8 @@ bool RISCVDAGToDAGISel::selectFPImm(SDValue N, SDValue &Imm) {
     return false;
   SDLoc DL(N);
   MVT XLenVT = Subtarget->getXLenVT();
-  Imm = SDValue(selectImm(CurDAG, DL, XLenVT,
-                          APF.bitcastToAPInt().getSExtValue(), *Subtarget),
-                0);
+  Imm = selectImm(CurDAG, DL, XLenVT, APF.bitcastToAPInt().getSExtValue(),
+                  *Subtarget);
   return true;
 }