[PATCH] D143154: [AMDGPU] Introduce divergence and uniform bit fields in tablegen
Yashwant Singh via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 3 01:10:45 PST 2023
yassingh updated this revision to Diff 494545.
yassingh added a comment.
Addressed review comments
- Using isNeverUniform instead of isSourceOfDivergence.
- Removed the bit for always uniform.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143154/new/
https://reviews.llvm.org/D143154
Files:
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIInstrFormats.td
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/lib/Target/AMDGPU/VOP2Instructions.td
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/always-uniform.mir
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/never-uniform.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D143154.494545.patch
Type: text/x-patch
Size: 4896 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230203/11adccb3/attachment.bin>
More information about the llvm-commits
mailing list