[PATCH] D143154: [AMDGPU] Introduce divergence and uniform bit fields in tablegen

[Ruiling, Song via Phabricator via llvm-commits]

ruiling added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrFormats.td:245
+  
+  let TSFlags{62} = IsAlwaysUniform;
+
----------------
As we have only very few alwaysUniform instruction, maybe we don't need this to save one bit.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143154/new/

https://reviews.llvm.org/D143154