[PATCH] D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions

[Monk Chiang via Phabricator via llvm-commits]

monkchiang updated this revision to Diff 494506.
monkchiang added a comment.

Change LMULWriteRes to LMULWriteResFWRed.

The following link shows LMUL of vfwredosum and vfwredusum are between MF4 to M8.
So I add LMULWriteResFWRed for widening floating-point Reduction.
https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/auto-generated/intrinsic_funcs/09_vector_reduction_functions.md#vector-widening-floating-point-reduction-functions


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141565/new/

https://reviews.llvm.org/D141565

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVScheduleV.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D141565.494506.patch
Type: text/x-patch
Size: 8142 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230203/0ccee7aa/attachment.bin>