[PATCH] D142461: [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible

Thu Feb 2 19:30:17 PST 2023

koakuma added inline comments.

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Comment at: llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp:45
   case Sparc::fixup_sparc_br16_2:
-    return (Value >> 2) & 0xc000;
+    return ((Value >> 2) & 0xc000) << 6;

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arsenm wrote:
> koakuma wrote:
> > Not really sure if this is the proper way to do it, but I've found that without the left shift, the integrated assembler would misplace the two upper bits of BPr branch displacements.
> > Comments?
> I know nothing about this, but it seems like it should be split into a separate patch
I'm afraid I couldn't split this, since the misplacement of the upper two bits would result in all backwards BPr branches being miscompiled.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142461/new/

https://reviews.llvm.org/D142461