[PATCH] D137670: [PowerPC] Switch to by-name matching for instructions (part 2 of 2).

[James Y Knight via Phabricator via llvm-commits]

jyknight added a comment.

Thanks for the reviews!



================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp:242
-    getMachineOpValue(MI, MI.getOperand(OpNo + 1), Fixups, STI) << 34;
-  assert(RegBits == 0 && "Operand must be 0.");
-
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barannikov88 wrote:
> The new version lacks the assertion. Does it make sense to add an `EncoderMethod` to `immZero` just for this?
> 
Verification in an encoder method that the MachineInstruction operand has a valid value is not typically done currently, for other kinds of operands. E.g. u5imm/etc don't have an EncoderMethod. Nor do other backends e.g. aarch64's simm8_32b/etc.

So I think it's probably not needed here, either.


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https://reviews.llvm.org/D137670