[PATCH] D143036: [RISCV] Add vendor-defined XTHeadBs (single-bit) extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Any plan to support `RISCVTargetLowering::isMaskAndCmp0FoldingBeneficial`, `RISCVTargetLowering::hasBitTest`, `performTRUNCATECombine` or `performANDCombine`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143036/new/

https://reviews.llvm.org/D143036