[PATCH] D142132: [AArch64] Map DestructiveTernaryCommWithRev intrinsics to pesudo instructions

[lizhijin via Phabricator via llvm-commits]

lizhijin added a comment.

ping



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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsic-fmla-fmad.ll:32
+  %0 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  %1 = tail call contract <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %0, <vscale x 2 x double> %r, <vscale x 2 x double> %r)
+  %2 = load double, double* getelementptr inbounds ([8 x double], [8 x double]* @g_val, i64 0, i64 0), align 8
----------------
Allen wrote:
> nit: Expect multiple small cases for different instructions
Modified.


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  https://reviews.llvm.org/D142132/new/

https://reviews.llvm.org/D142132