[PATCH] D143029: [RISCV] Add vendor-defined XTHeadBa (address-generation) extension

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rv64xtheadba.ll:66
+; If the shl is selected as sllw, we don't need the sext_inreg.
+define i64 @sh2add_extra_sext(i32 %x, i32 %y, i32 %z) {
+; RV64I-LABEL: sh2add_extra_sext:
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And this one too.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143029/new/

https://reviews.llvm.org/D143029