[PATCH] D142997: [RISCV] Move the even register check for rv32zdinx later in the matching process.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Hm, teaching AsmMatcherEmitter to pass ErrorInfo into checkTargetMatchPredicate (and I guess checkEarlyTargetMatchPredicate for completeness) looks pretty straightforward and would restore the ability to point at the operand's loc



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Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:377-379
+  bool isGPRF64AsFPR() const { return isGPR() && Reg.IsGPRAsFPR; }
 
+  bool isGPRPF64AsFPR() const { return isGPR() && Reg.IsGPRAsFPR; }
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Is there a reason we'd want to keep these two and not just use isGPRAsFPR everywhere?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D142997/new/

https://reviews.llvm.org/D142997