[PATCH] D142594: [AArch64] Eliminating the use of integer unit in moving from a Neon scalar result of a uaddlv to a Neon vector

[NILANJANA BASU via Phabricator via llvm-commits]

nilanjana_basu created this revision.
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nilanjana_basu updated this revision to Diff 492970.
nilanjana_basu added a comment.
nilanjana_basu updated this revision to Diff 493786.
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Added all the variants of uaddlv, added 9 more unit tests & reduced the code for the pattern match.


nilanjana_basu added a comment.

Added more patterns to match different types of vector insertion for the same set of 'uaddlv' functions


nilanjana_basu added a comment.

The code generated for inserting the scalar result of a 'uaddlv' intrinsic function to a vector exhibits a redundant move to the integer register first, & then moves it back to the destination vector Neon register. This can be done directly. In my understanding, this issue occurs because the selected instruction for vector insertion expects an i32/i64 integer register to hold the value and the selected instruction for the 'uaddlv' function is giving an output of i32/i64 at the instruction selection time, whereas in practice the result of 'uaddlv' goes to a Neon register. Therefore I added patterns to match the combined use of these two instructions (uaddlv & vector_insert), to generate the direct move from the source to destination Neon register.

I am seeking feedback on whether there exists a better/more generic way of doing this, since currently we are matching patterns case by case. Even though I tried to be exhaustive, it's easy to miss a pattern. Please let me know your thoughts on this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D142594

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll

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