[PATCH] D143016: [InstCombine] Promote expression tree with @llvm.vscale when zero-extending result.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/vscale.ll:18
+; CHECK-NEXT:    [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[SHL:%.*]] = shl nuw nsw i64 [[VSCALE]], 3
+; CHECK-NEXT:    ret i64 [[SHL]]
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goldstein.w.n wrote:
> Is this semantically equivilent? Unfortunately alive2 doesn't support `@llvm.vscale` but is it possible for anything in `vscale[29:31]` to be set? If so the result will be different.
The vscale_range attribute is placing a limit on the upper bound. I think without that there would be an AND instruction at the end to clear the upper bits.


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  https://reviews.llvm.org/D143016/new/

https://reviews.llvm.org/D143016