[PATCH] D143016: [InstCombine] Promote expression tree with @llvm.vscale when zero-extending result.

Noah Goldstein via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 31 15:16:53 PST 2023


goldstein.w.n added inline comments.


================
Comment at: llvm/test/Transforms/InstCombine/vscale.ll:18
+; CHECK-NEXT:    [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[SHL:%.*]] = shl nuw nsw i64 [[VSCALE]], 3
+; CHECK-NEXT:    ret i64 [[SHL]]
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Is this semantically equivilent? Unfortunately alive2 doesn't support `@llvm.vscale` but is it possible for anything in `vscale[29:31]` to be set? If so the result will be different.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143016/new/

https://reviews.llvm.org/D143016



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