[PATCH] D142904: [AArch64][SME2] Add multi-vector zip/uzp intrinsics

[David Sherwood via Phabricator via llvm-commits]

david-arm created this revision.
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This patch adds the LLVM IR intrinsics for the following:

- zip (2 and 4 vectors, 8 to 64-bit elements) - aarch64.sve.zip.*
- zip (2 and 4 vectors, 128-bit elements) - aarch64.sve.zipq.*
- uzp (2 and 4 vectors, 8 to 64-bit elements) - aarch64.sve.uzp.*
- uzp (2 and 4 vectors, 128-bit elements) - aarch64.sve.uzpq.*

I have created separate intrinsics for the 128-bit variants
in a similar way to what was done for int_aarch64_sme_readq_horiz.
This permits us to use any vector type (<vscale x 16 x i8>, etc.)
for the 128-bit versions.

I have also named the tests sve2p1-intrinsics-* because although
the instructions are added as part of the SME2 feature they only
operate on SVE vectors.

NOTE: These intrinsics are still in development and are subject to future changes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D142904

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpx2.ll
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpx4.ll
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipx2.ll
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipx4.ll

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