[llvm] 94c4499 - [X86] combinePredicateReduction - pull out SETCC handling for all_of(icmp_eq) reductions. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 30 04:54:28 PST 2023
Author: Simon Pilgrim
Date: 2023-01-30T12:54:14Z
New Revision: 94c4499bc73acd2b40f634b2d3bfc8f633a1a1fd
URL: https://github.com/llvm/llvm-project/commit/94c4499bc73acd2b40f634b2d3bfc8f633a1a1fd
DIFF: https://github.com/llvm/llvm-project/commit/94c4499bc73acd2b40f634b2d3bfc8f633a1a1fd.diff
LOG: [X86] combinePredicateReduction - pull out SETCC handling for all_of(icmp_eq) reductions. NFC.
Minor cleanup before we can handle any_of(icmp_ne) with the same code.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 85d4855b1df08..965bccdfd0bf3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -44283,17 +44283,21 @@ static SDValue combinePredicateReduction(SDNode *Extract, SelectionDAG &DAG,
Movmsk = DAG.getBitcast(MovmskVT, Match);
} else {
// For all_of(setcc(x,y,eq)) - use PMOVMSKB(PCMPEQB()).
- if (BinOp == ISD::AND && Match.getOpcode() == ISD::SETCC &&
- cast<CondCodeSDNode>(Match.getOperand(2))->get() ==
- ISD::CondCode::SETEQ) {
- EVT VecSVT = Match.getOperand(0).getValueType().getScalarType();
- if (VecSVT != MVT::i8 && (VecSVT.getSizeInBits() % 8) == 0) {
- NumElts *= VecSVT.getSizeInBits() / 8;
- EVT CmpVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, NumElts);
- MatchVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElts);
- Match = DAG.getSetCC(
- DL, MatchVT, DAG.getBitcast(CmpVT, Match.getOperand(0)),
- DAG.getBitcast(CmpVT, Match.getOperand(1)), ISD::CondCode::SETEQ);
+ // TODO: any_of(setcc(x,y,ne)) - use PMOVMSKB(NOT(PCMPEQB())).
+ if (Match.getOpcode() == ISD::SETCC) {
+ ISD::CondCode CC = cast<CondCodeSDNode>(Match.getOperand(2))->get();
+ if (BinOp == ISD::AND && CC == ISD::CondCode::SETEQ) {
+ EVT VecVT = Match.getOperand(0).getValueType();
+ EVT VecSVT = VecVT.getScalarType();
+ if (VecSVT != MVT::i8 && (VecSVT.getSizeInBits() % 8) == 0) {
+ NumElts *= VecSVT.getSizeInBits() / 8;
+ EVT CmpVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, NumElts);
+ MatchVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElts);
+ Match = DAG.getSetCC(DL, MatchVT,
+ DAG.getBitcast(CmpVT, Match.getOperand(0)),
+ DAG.getBitcast(CmpVT, Match.getOperand(1)),
+ ISD::CondCode::SETEQ);
+ }
}
}
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