[PATCH] D141653: [X86] Improve instruction ordering of constant `srl/shl` with `and` to get better and-masks

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


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Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:4013-4015
+  /// @param Shift1 outer shift Node
+  /// @param Op to combine shifts across
+  /// @param Shift2 inner shift Node
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Is `Shift1` inner and `Shift2` outer?


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9414
   return SDValue();
-}
+  }
 
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pengfei wrote:
> Unintended change.
This still no changed.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:56685-56686
+bool X86TargetLowering::isDesirableToCombineShiftsAcross(
+    const SDNode *Shift1, const SDNode *Op, SDNode *Shift2,
+    CombineLevel Level) const {
+  return true;
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The arguments are not used. Leave it `void` for now?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141653/new/

https://reviews.llvm.org/D141653