[PATCH] D142797: [X86] Make `prefetchit{0/1}` emit an assembler warning if the operand is not rip-rel

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n updated this revision to Diff 493138.
goldstein.w.n added a comment.

Use `X86::AddrBaseReg` instead of looping


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142797/new/

https://reviews.llvm.org/D142797

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/MC/X86/prefetchit-non-rip-op.s


Index: llvm/test/MC/X86/prefetchit-non-rip-op.s
===================================================================
--- /dev/null
+++ llvm/test/MC/X86/prefetchit-non-rip-op.s
@@ -0,0 +1,67 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t 2> %t.err
+// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
+// RUN: FileCheck < %t %s
+
+// CHECK: prefetchit0 (%rdi)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 (%rdi)
+
+// CHECK: prefetchit1 (%rcx)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 (%rcx)
+
+// CHECK: prefetchit0 1(%rdx)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 1(%rdx)
+
+// CHECK: prefetchit1 12(%rsi)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 12(%rsi)
+
+// CHECK: prefetchit0 123(%r8,%rax)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 123(%r8,%rax)
+
+// CHECK: prefetchit1 1234(%r9,%r10)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 1234(%r9,%r10)
+
+// CHECK: prefetchit0 (%r11,%r12)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 (%r11,%r12)
+
+// CHECK: prefetchit1 (%r13,%r14)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 (%r13,%r14)
+
+// CHECK: prefetchit0 987(%rsp,%r15,4)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 987(%rsp,%r15,4)
+
+// CHECK: prefetchit1 -1(%rbp,%rdi,8)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 -1(%rbp,%rdi,8)
+
+// CHECK: prefetchit0 (%rsp,%rsi,2)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 (%rsp,%rsi,2)
+
+// CHECK: prefetchit1 (%rdi,%r15,4)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 (%rdi,%r15,4)
+
+// CHECK: prefetchit0 80(,%r14,8)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 80(,%r14,8)
+
+// CHECK: prefetchit1 3(,%r8,4)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 3(,%r8,4)
+
+// CHECK: prefetchit0 (,%rax,2)
+// CHECK-STDERR: warning: 'prefetchit0' only supports RIP-relative address
+          prefetchit0 (,%rax,2)
+
+// CHECK: prefetchit1 (,%rcx,8)
+// CHECK-STDERR: warning: 'prefetchit1' only supports RIP-relative address
+          prefetchit1 (,%rcx,8)
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3923,6 +3923,15 @@
     }
   }
 
+  if ((Opcode == X86::PREFETCHIT0 || Opcode == X86::PREFETCHIT1)) {
+    const MCOperand &MO = Inst.getOperand(X86::AddrBaseReg);
+    if (!MO.isReg() || MO.getReg() != X86::RIP)
+      return Warning(
+          Ops[0]->getStartLoc(),
+          Twine((Inst.getOpcode() == X86::PREFETCHIT0 ? "'prefetchit0'"
+                                                      : "'prefetchit1'")) +
+              " only supports RIP-relative address");
+  }
   return false;
 }
 


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