[PATCH] D142797: [X86] Make `prefetchit{0/1}` emit an assembler warning if the operand is not rip-rel
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 29 00:45:38 PST 2023
pengfei added inline comments.
================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3927-3928
+ if ((Opcode == X86::PREFETCHIT0 || Opcode == X86::PREFETCHIT1)) {
+ for (unsigned i = 0; i < Inst.getNumOperands(); i++) {
+ const MCOperand &MO = Inst.getOperand(i);
+ if (!MO.isReg() || MO.getReg() == X86::NoRegister)
----------------
How about `Inst.getOperand(X86::AddrBaseReg)`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142797/new/
https://reviews.llvm.org/D142797
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