[llvm] 6213606 - [RISCV] Move IsGPRAsFPR into RegOp struct in RISCVOperand. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 29 12:41:47 PST 2023
Author: Craig Topper
Date: 2023-01-29T12:41:01-08:00
New Revision: 621360657bc4b00a4f978d60ed3dc63d873967bd
URL: https://github.com/llvm/llvm-project/commit/621360657bc4b00a4f978d60ed3dc63d873967bd
DIFF: https://github.com/llvm/llvm-project/commit/621360657bc4b00a4f978d60ed3dc63d873967bd.diff
LOG: [RISCV] Move IsGPRAsFPR into RegOp struct in RISCVOperand. NFC
This field is only initialized for register operands, move it into
the struct to make that clear.
This also fixes a potential bug where the field wasn't copied by
the RISCVOperand copy constructor.
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index c406ba382c28..0c8b551879e2 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -282,10 +282,9 @@ struct RISCVOperand : public MCParsedAsmOperand {
bool IsRV64;
- bool IsGPRAsFPR;
-
struct RegOp {
MCRegister RegNum;
+ bool IsGPRAsFPR;
};
struct ImmOp {
@@ -362,12 +361,13 @@ struct RISCVOperand : public MCParsedAsmOperand {
RISCVMCRegisterClasses[RISCV::GPRRegClassID].contains(Reg.RegNum);
}
- bool isGPRAsFPR() const { return isGPR() && IsGPRAsFPR; }
+ bool isGPRAsFPR() const { return isGPR() && Reg.IsGPRAsFPR; }
- bool isGPRF64AsFPR() const { return isGPR() && IsGPRAsFPR && IsRV64; }
+ bool isGPRF64AsFPR() const { return isGPR() && Reg.IsGPRAsFPR && IsRV64; }
bool isGPRPF64AsFPR() const {
- return isGPR() && IsGPRAsFPR && !IsRV64 && !((Reg.RegNum - RISCV::X0) & 1);
+ return isGPR() && Reg.IsGPRAsFPR && !IsRV64 &&
+ !((Reg.RegNum - RISCV::X0) & 1);
}
static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm,
@@ -867,10 +867,10 @@ struct RISCVOperand : public MCParsedAsmOperand {
bool IsGPRAsFPR = false) {
auto Op = std::make_unique<RISCVOperand>(KindTy::Register);
Op->Reg.RegNum = RegNo;
+ Op->Reg.IsGPRAsFPR = IsGPRAsFPR;
Op->StartLoc = S;
Op->EndLoc = E;
Op->IsRV64 = IsRV64;
- Op->IsGPRAsFPR = IsGPRAsFPR;
return Op;
}
More information about the llvm-commits
mailing list