[PATCH] D142020: AMDGPU: Partially fix machine uniformity for inline asm

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 29 05:00:15 PST 2023


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8407-8416
+  unsigned opcode = MI.getOpcode();
+  if (MI.isCopy()) {
+    const MachineOperand &srcOp = MI.getOperand(1);
+    if (srcOp.isReg() && srcOp.getReg().isPhysical()) {
+      const TargetRegisterClass *regClass =
+          RI.getPhysRegBaseClass(srcOp.getReg());
+      return RI.isSGPRClass(regClass) ? InstructionUniformity::AlwaysUniform
----------------
Pierre-vh wrote:
> Variable names need to start with an upper case letter
This is just moving existing code, rename should be separate 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142020/new/

https://reviews.llvm.org/D142020



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