[PATCH] D142409: [RISCV][InsertVSETVLI] Handle partially transparent instructions in PRE
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 25 09:32:48 PST 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:1201
+ VSETVLIInfo CurInfo = AvailableInfo;
+ int64_t TransitionsRemoved = 0;
+ for (const MachineInstr &MI : MBB) {
----------------
reames wrote:
> craig.topper wrote:
> > Why int64_t as opposed to int?
> What's the largest number of instructions a basic block can hold? Is it bounded by an i31? It probably is in all practical term, but int64_t felt "safer".
I'd imagine you'd run out of virtual register numbers before you got past i31. Unless you had a lot of instructions that didn't write a register.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142409/new/
https://reviews.llvm.org/D142409
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