[PATCH] D142227: [RISCV][LSR] Treat number of instructions as dominate factor in LSR cost decisions

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 24 11:43:20 PST 2023


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa9871772a8b1: [RISCV][LSR] Treat number of instructions as dominate factor in LSR cost… (authored by reames).

Changed prior to commit:
  https://reviews.llvm.org/D142227?vs=490877&id=491864#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142227/new/

https://reviews.llvm.org/D142227

Files:
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
  llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
  llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D142227.491864.patch
Type: text/x-patch
Size: 25197 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230124/f2d61b43/attachment.bin>


More information about the llvm-commits mailing list