[PATCH] D142227: [RISCV][LSR] Treat number of instructions as dominate factor in LSR cost decisions

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:1478
+                                 const TargetTransformInfo::LSRCost &C2) {
+  // RISCV specific here are "instruction number 1st priority".
+  return std::tie(C1.Insns, C1.NumRegs, C1.AddRecCost,
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asb wrote:
> Maybe "Use instruction count rather than number of registers as the dominant cost." would more clearly express how this differs to the default implementation?
This exact comment is used in multiple targets.  It looks like a good candidate for some code restructuring, and I biased in terms of making it easily grep-able.  


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142227/new/

https://reviews.llvm.org/D142227