[PATCH] D142396: [AArch64] Add the Ampere1A core

[Philipp Tomsich via Phabricator via llvm-commits]

philipp.tomsich added inline comments.


================
Comment at: llvm/include/llvm/TargetParser/AArch64TargetParser.h:492
+    {"ampere1a", ARMV8_6A,
+     (AArch64::AEK_FP16 | AArch64::AEK_RAND | AArch64::AEK_SM4 |
+      AArch64::AEK_SHA3 | AArch64::AEK_SHA2 | AArch64::AEK_AES |
----------------
dmgreen wrote:
> Just to check, you didn't mention SM4 in the commit message or the gcc patch from https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605942.html. Should that be included here?
I'll have to review GCC I guess.
Small omissions are still possible, as we didn't get a /proc/cpuinfo to test -mcpu=native against -mcpu=ampere1a yet...

The manual states "The second-generation core adds support for the Memory Tagging Extension and SM3/SM4 cryptography instructions."  So yes, it should be included.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142396/new/

https://reviews.llvm.org/D142396