[PATCH] D142264: [RISCV] Combine extract_vector_elt followed by VFMV_S_F_VL.

[Philip Reames via Phabricator via llvm-commits]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10577
+        return Src.getOperand(0);
+      // TODO: Use insert_subvector/extract_subvector to change widen/narrow?
+    }
----------------
luke wrote:
> Do we need to handle the case when VL=0 and the destination register is preserved?
We checked the passthru result was undef above, so if VL=0 the result is fully undef.  


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https://reviews.llvm.org/D142264