[PATCH] D142227: [RISCV][LSR] Treat number of instructions as dominate factor in LSR cost decisions

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 24 08:03:56 PST 2023


asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

This LGTM (I'm not very familiar with these cost calculations though, so consider this a weak approval!).

It looks like we might want to consider, in a followup patch, also implementing `isNumRegsMajorCostOfLSR` to returning false (introduced in D89665 <https://reviews.llvm.org/D89665>)?



================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:1478
+                                 const TargetTransformInfo::LSRCost &C2) {
+  // RISCV specific here are "instruction number 1st priority".
+  return std::tie(C1.Insns, C1.NumRegs, C1.AddRecCost,
----------------
Maybe "Use instruction count rather than number of registers as the dominant cost." would more clearly express how this differs to the default implementation?


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CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D142227



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