[PATCH] D142210: [AArch64][SME2] Add Multi-vector add/sub and accumulate into ZA intrinsic

[Caroline via Phabricator via llvm-commits]

CarolineConcatto updated this revision to Diff 491804.
CarolineConcatto marked 2 inline comments as done.
CarolineConcatto added a comment.

-Use only one set of foreach couple in IntrinsicsAArch64.td to build
 VG4 and VG2 add/sub instructions


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142210/new/

https://reviews.llvm.org/D142210

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
  llvm/lib/Target/AArch64/SMEInstrFormats.td
  llvm/test/CodeGen/AArch64/sme2-intrinsics-add.ll
  llvm/test/CodeGen/AArch64/sme2-intrinsics-sub.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D142210.491804.patch
Type: text/x-patch
Size: 34151 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230124/be4e947f/attachment.bin>