[PATCH] D142210: [AArch64][SME2] Add Multi-vector add/sub and accumulate into ZA intrinsic

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2881
+    foreach za = ["za32", "za64"] in {
+      def int_aarch64_sme_ # intr # _ # za # _vg1x4 : SME2_ZA_Write_VG4_Intrinsic;
+    }
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Can this be added to the foreach loop above? I think the values for `intr` and `za` are the same in both.


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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:131
           (!cast<Instruction>(name # _PSEUDO) $base, $offset, (REG_SEQUENCE ZPR2Mul2, vt:$Zn1, zsub0, vt:$Zn2, zsub1))>;
+class SME2_ZA_VG1x4_Multi_Pat<string name, SDPatternOperator intrinsic, ValueType vt, Operand index_ty, ComplexPattern tileslice>
+    : Pat<(intrinsic (i32 (tileslice MatrixIndexGPR32Op8_11:$base, index_ty:$offset)), vt:$Zn1, vt:$Zn2, vt:$Zn3, vt:$Zn4),
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nit: please can you add a space between these classes :)


Repository:
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  https://reviews.llvm.org/D142210/new/

https://reviews.llvm.org/D142210