[PATCH] D141557: [AMDGPU] Further reduce attaching of implicit operands to spills / copies

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:611-616
+        if (ImpDefSuperReg)
+          Builder.addReg(ImpUseSuperReg,
+                      RegState::Define | RegState::Implicit);
+        else
+          Builder.addReg(ImpUseSuperReg,
                       getKillRegState(KillSrc) | RegState::Implicit);
----------------
Should do logic on the flags operand and have one addReg call


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:662-666
+       UseBuilder.addReg(ImpUseSuperReg,
+                      RegState::Define | RegState::Implicit);
+    else
+      UseBuilder.addReg(ImpUseSuperReg,
                       getKillRegState(KillSrc) | RegState::Implicit);
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:1027
+      Register ImpDefSuper = IsFirstSubreg ? Register(DestReg) : Register();
+      Register ImpUseSuper = (!Idx || (Idx == SubIndices.size() - 1)) ? Register(SrcReg) : Register();
       indirectCopyToAGPR(*this, MBB, MI, DL, RI.getSubReg(DestReg, SubIdx),
----------------
Didn't use the IsLastSubreg defined above


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141557/new/

https://reviews.llvm.org/D141557