[PATCH] D141557: [AMDGPU] Further reduce attaching of implicit operands to spills / copies

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes created this revision.
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Extension of https://reviews.llvm.org/D141101 to even further reduce the amount of implicit operands we attach. The main benefit is to improve cability of post-ra scheduler, and reduce unneeded dependency resolution (e.g. inserting snops).

Unfortunately, we run into regressions if we completely minimize the amount implicit operands (naively), we run into some regressions (e.g. dual_movs are replaced with multiple calls to v_mov). This is even more reason to switch to LiveRegUnits.

Nonetheless, this patch removes the operands which we can for free (more or less).

Change-Id: Ib4f409202b36bdbc59eed615bc2d19fa8bd8c057


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141557

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
  llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
  llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
  llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
  llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
  llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
  llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
  llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
  llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
  llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
  llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
  llvm/test/CodeGen/AMDGPU/spill192.mir
  llvm/test/CodeGen/AMDGPU/spill224.mir
  llvm/test/CodeGen/AMDGPU/spill288.mir
  llvm/test/CodeGen/AMDGPU/spill320.mir
  llvm/test/CodeGen/AMDGPU/spill352.mir
  llvm/test/CodeGen/AMDGPU/spill384.mir
  llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/vgpr-spill.mir