[PATCH] D141419: [DAGCombine] Suppress some foldings of rounding to fp16

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll:68
+; With 'unsafe-fp-math', it is legal to fold this to converting directly
+; from 'double' -> 'half'.  But that is generally less efficient (done
+; via slow run-time calls) than the two-step unfolded approach.  So
----------------
It's still efficient to in the AVX case. Calling to single run-time is better than `vcvtsd2ss` + `__truncsfhf2`.


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  https://reviews.llvm.org/D141419/new/

https://reviews.llvm.org/D141419