[PATCH] D141043: [AArch64][SVE] Avoid AND operation if both side are splat of i1 or PTRUE
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 10 08:57:00 PST 2023
david-arm added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve-splat-one-and-ptrue.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
----------------
I think this is still missing tests for the more general case where only one AND operand is an all-active predicate. Your logic on line 16380 permits this more general behaviour so we ought to test it.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141043/new/
https://reviews.llvm.org/D141043
More information about the llvm-commits
mailing list